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1 LT1934/LT1934-1 1934f micropower step-down switching regulators in thinsot , ltc and lt are registered trademarks of linear technology corporation. the lt ? 1934 is a micropower step-down dc/dc con- verter with internal 400ma power switch, packaged in a low profile (1mm) thinsot. with its wide input range of 3.2v to 34v, the LT1934 can regulate a wide variety of power sources, from 4-cell alkaline batteries and 5v logic rails to unregulated wall transformers and lead-acid bat- teries. quiescent current is just 12 m a and a zero current shutdown mode disconnects the load from the input source, simplifying power management in battery-pow- ered systems. burst mode ? operation and the low drop internal power switch result in high efficiency over a broad range of load current. the LT1934 provides up to 300ma of output current. the LT1934-1 has a lower current limit, allowing optimum choice of external components when the required output current is less than 60ma. fast current limiting protects the LT1934 and external components against shorted outputs, even at 34v input. n wide input voltage range: 3.2v to 34v n micropower operation: i q = 12 m a n 5v at 250ma from 6.5v to 34v input (LT1934) n 5v at 60ma from 6.5v to 34v input (LT1934-1) n 3.3v at 250ma from 4.5v to 34v input (LT1934) n 3.3v at 60ma from 4.5v to 34v input (LT1934-1) n low shutdown current: <1 m a n low v cesat switch: 200mv at 300ma n low profile (1mm) sot-23 (thinsot tm ) package n wall transformer regulation n automotive battery regulation n standby power for portable products n distributed supply regulation n industrial control supplies 3.3v step-down converter efficiency burst mode is a registered trademark of linear technology corporation. thinsot is a trademark of linear technology corporation. boost v in LT1934 shdn 1934 ta01 c2 2.2 f 0.22 f 10pf c1: sanyo 4tpb100m c2: taiyo yuden gmk325bj225mn d1: on semiconductor mbr0540 d2: central cmdsh-3 l1: sumida cdrh4d28-470 v out 3.3v 250ma d2 604k 1m l1 47 h d1 v in 4.5v to 34v on off sw fb gnd c1 100 f + load current (ma) 60 efficiency (%) 70 80 90 100 0.1 10 100 1934 ta02 50 1 LT1934 v in = 12v v out = 5v v out = 3.3v descriptio u features applicatio s u typical applicatio u
2 LT1934/LT1934-1 1934f (note 1) input voltage (v in ) ................................................. 34v boost pin voltage ................................................. 40v boost pin above sw pin ...................................... 20v shdn pin ............................................................... 34v fb voltage ................................................................ 6v sw voltage ............................................................... v in operating temperature range (note 2) .......................... LT1934e/LT1934e-1 ......................... C 40 c to 85 c LT1934i/LT1934i-1 ......................... C 40 c to 125 c maximum junction temperature .......................... 125 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c t jmax = 125 c, q ja = 250 c/ w, q jc = 102 c/ w order part number s6 part marking LT1934es6 LT1934es6-1 LT1934is6 LT1934is6-1 ltxp ltf8 ltajb ltajc absolute axi u rati gs w ww u package/order i for atio uu w boost 1 gnd 2 fb 3 6 sw 5 v in 4 shdn top view s6 package 6-lead plastic sot-23 consult ltc marketing for parts specified with wider operating temperature ranges. parameter conditions min typ max units undervoltage lockout 3 3.2 v C40 c t a 85 c l 3 3.6 v C40 c t a 125 c l 3 3.6 v quiescent current v fb = 1.3v 12 22 m a C40 c t a 85 c l 12 26 m a C40 c t a 125 c l 12 26 m a v shdn = 0v 0.01 2 m a fb comparator trip voltage v fb falling C40 c t a 85 c l 1.22 1.25 1.27 v C40 c t a 125 c l 1.21 1.25 1.27 v fb comparator hysteresis 10 mv fb pin bias current v fb = 1.25v C40 c t a 85 c l 2 15 na C40 c t a 125 c l 2 60 na fb voltage line regulation 4v < v in < 34v 0.007 %/v switch off time v fb > 1v 1.4 1.8 2.3 m s v fb = 0v 12 m s maximum duty cycle v fb = 1v C40 c t a 85 c l 85 88 % C40 c t a 125 c l 83 88 % switch v cesat i sw = 300ma (LT1934) 200 300 mv i sw = 75ma (LT1934-1) 65 120 mv switch current limit LT1934 350 400 490 ma LT1934-1 90 120 160 ma boost pin current i sw = 300ma (LT1934) 8.5 12 ma i sw = 75ma (LT1934-1) 6.0 10 ma minimum boost voltage (note 3) i sw = 300ma (LT1934) 1.8 2.5 v i sw = 75ma (LT1934-1) 1.7 2.5 v switch leakage current 2 m a the l denotes specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v in = 10v, v boost = 15v, unless otherwise noted. electrical characteristics
3 LT1934/LT1934-1 1934f typical perfor a ce characteristics uw LT1934 efficiency, v out = 5v LT1934 efficiency, v out = 3.3v current limit vs temperature off time vs temperature load current (ma) 60 efficiency (%) 70 80 90 100 0.1 10 100 1934 g01 50 1 LT1934 v out = 5v l = 47 h t a = 25 c v in = 12v v in = 24v load current (ma) 60 efficiency (%) 70 80 90 100 0.1 10 100 1934 g02 50 1 LT1934 v out = 3.3v l = 47 h t a = 25 c v in = 24v v in = 5v v in = 12v load current (ma) 0.1 50 efficiency (%) 80 90 100 1 10 100 1934 g03 70 60 LT1934-1 v out = 5v l = 150 h t a = 25 c v in = 24v v in = 12v LT1934-1 efficiency, v out = 5v LT1934-1 efficiency, v out = 3.3v load current (ma) 0.1 50 efficiency (%) 80 90 100 1 10 100 1934 g04 70 60 LT1934-1 v out = 3.3v l = 100 h t a = 25 c v in = 24v v in = 12v temperature ( c) 50 ?5 0 switch current limit (ma) 200 500 0 50 75 1934 g05 100 400 300 25 100 125 LT1934 LT1934-1 temperature ( c) ?0 off time ( s) 2.0 2.5 3.0 25 75 1934 g06 1.5 1.0 ?5 0 50 100 125 0.5 0 note 1: absolute maximum ratings are those values beyond which the life of the device may be impaired. note 2: the LT1934e and LT1934e-1 are guaranteed to meet performance specifications from 0 c to 70 c. specifications over the C40 c to 85 c operating temperature range are assured by design, characterization and correlation with statistical process controls. the LT1934i and LT1934i-1 specifications are guaranteed over the C40 c to 125 c temperature range. note 3: this is the minimum voltage across the boost capacitor needed to guarantee full saturation of the internal power switch. the l denotes specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v in = 10v, v boost = 15v, unless otherwise noted. electrical characteristics parameter conditions min typ max units shdn pin current v shdn = 2.3v 0.5 m a v shdn = 34v 1.5 5 m a shdn input voltage high 2.3 v shdn input voltage low 0.25 v
4 LT1934/LT1934-1 1934f typical perfor a ce characteristics uw quiescent current vs temperature undervoltage lockout vs temperature minimum input voltage v out = 3.3v minimum input voltage v out = 5v temperature ( c) ?0 0 quiescent current ( a) 5 10 15 20 25 0 25 50 1934 g10 75 100 125 temperature ( c) ?0 2.0 uvlo (v) 2.5 3.0 3.5 4.0 25 0 25 50 1934 g11 75 100 125 load current (ma) 3.5 input voltage (v) 4.0 4.5 5.0 5.5 6.0 0.1 10 100 1934 g12 3.0 1 LT1934 v out = 3.3v t a = 25 c boost diode tied to output v in to start v in to run load current (ma) 5 input voltage (v) 6 7 8 0.1 10 100 1934 g13 4 1 LT1934 v out = 5v t a = 25 c boost diode tied to output v in to start v in to run frequency foldback v fb vs temperature shdn bias current vs shdn voltage feedback pin voltage (v) 0 switch off time ( s) 6 8 10 0.6 1.0 1934 g07 4 2 0 0.2 0.4 0.8 12 14 16 1.2 t a = 25 c temperature ( c) 50 ?5 1.22 feedback voltage (v) 1.24 1.27 0 50 75 1934 g08 1.23 1.26 1.25 25 100 125 shdn pin voltage (v) 0 0 shdn pin current ( a) 0.5 1.0 1.5 2.0 2468 1934 g09 10 12 t a = 25 c
5 LT1934/LT1934-1 1934f uu u pi fu ctio s boost (pin 1): the boost pin is used to provide a drive voltage, higher than the input voltage, to the internal bipolar npn power switch. gnd (pin 2): tie the gnd pin to a local ground plane below the LT1934 and the circuit components. return the feed- back divider to this pin. fb (pin 3): the LT1934 regulates its feedback pin to 1.25v. connect the feedback resistor divider tap to this pin. set the output voltage according to v out = 1.25v (1 + r1/r2) or r1 = r2 (v out /1.25 C 1). shdn (pin 4): the shdn pin is used to put the LT1934 in shutdown mode. tie to ground to shut down the LT1934. apply 2.3v or more for normal operation. if the shutdown feature is not used, tie this pin to the v in pin. v in (pin 5): the v in pin supplies current to the LT1934s internal regulator and to the internal power switch. this pin must be locally bypassed. sw (pin 6): the sw pin is the output of the internal power switch. connect this pin to the inductor, catch diode and boost capacitor. block diagra w + + 12 s delay on time off time 1.8 s delay r s q boost sw fb r2 r1 1934 bd v out l1 d2 c3 c1 d1 q 1 6 3 v in c2 + v in on off gnd enable feedback comparator 5 2 shdn 4 v ref 1.25v
6 LT1934/LT1934-1 1934f operatio u the LT1934 uses burst mode control, combining both low quiescent current operation and high switching frequency, which result in high efficiency across a wide range of load currents and a small total circuit size. a comparator monitors the voltage at the fb pin of the LT1934. if this voltage is higher than the internal 1.25v reference, the comparator disables the oscillator and power switch. in this state, only the comparator, reference and undervoltage lockout circuits are active, and the current into the v in pin is just 12 m a. as the load current discharges the output capacitor, the voltage at the fb pin falls below 1.25v and the comparator enables the oscillator. the LT1934 begins to switch, delivering current to the output capacitor. the output voltage rises, and when it overcomes the feedback comparators hysteresis, the oscillator is disabled and the LT1934 returns to its micropower state. the oscillator consists of two one-shots and a flip-flop. a rising edge from the off-time one-shot sets the flip- flop, which turns on the internal npn power switch. the switch remains on until either the on-time one-shot trips or the current limit is reached. a sense resistor and amplifier monitor the current through the switch and resets (refer to block diagram) the flip-flop when this current reaches 400ma (120ma for the LT1934-1). after the 1.8 m s delay of the off-time one-shot, the cycle repeats. generally, the LT1934 will reach current limit on every cyclethe off time is fixed and the on time is regulated so that the LT1934 operates at the correct duty cycle. the 1.8 m s off time is lengthened when the fb pin voltage falls below 0.8v; this foldback behavior helps control the output current during start-up and overload. figure 1 shows several waveforms of an LT1934 producing 3.3v from a 10v input. when the switch is on, the sw pin voltage is at 10v. when the switch is off, the inductor current pulls the sw pin down until it is clamped near ground by the external catch diode. the switch driver operates from either the input or from the boost pin. an external capacitor and diode are used to generate a voltage at the boost pin that is higher than the input supply. this allows the driver to fully saturate the bipolar switch for efficient operation. if the shdn pin is grounded, all internal circuits are turned off and v in current reduces to the device leakage current, typically a few na. v out 50mv/div v sw 10v/div figure 1. operating waveforms of the LT1934 converting 10v to 3.3v at 180ma (front page schematic) 1934 f01a i sw 0.5a/div i li 0.5a/div 5 m s/div
7 LT1934/LT1934-1 1934f applicatio s i for atio wu uu which one to use: LT1934 or LT1934-1? the only difference between the LT1934 and LT1934-1 is the peak current through the internal switch and the inductor. if your maximum load current is less than 60ma, use the LT1934-1. if your maximum load is higher, use the LT1934; it can supply up to ~300ma. while the LT1934-1 cant deliver as much output current, it has other advantages. the lower peak switch current allows the use of smaller components (input capacitor, inductor and output capacitor). the ripple current at the input of the LT1934-1 circuit will be smaller and may be an important consideration if the input supply is current limited or has high impedance. the LT1934-1s current draw during faults (output overload or short) and start-up is lower. the maximum load current that the LT1934 or LT1934-1 can deliver depends on the value of the inductor used. table 1 lists inductor value, minimum output capacitor and maximum load for 3.3v and 5v circuits. increasing the value of the capacitor will lower the output voltage ripple. component selection is covered in more detail in the following sections. minimum input voltage the minimum input voltage required to generate a particu- lar output voltage is determined by either the LT1934s undervoltage lockout of ~3v or by its maximum duty cycle. the duty cycle is the fraction of time that the internal switch is on and is determined by the input and output voltages: dc = (v out + v d )/(v in C v sw + v d ) where v d is the forward voltage drop of the catch diode (~0.4v) and v sw is the voltage drop of the internal switch (~0.3v at maximum load for the LT1934, ~0.1v for the LT1934-1). this leads to a minimum input voltage of: v in(min) = (v out + v d )/dc max C v d + v sw with dc max = 0.85. inductor selection a good first choice for the inductor value is: l = 2.5 ? (v out + v d ) ? 1.8 m s/i lim where i lim is the switch current limit (400ma for the LT1934 and 120ma for the LT1934-1). this choice pro- vides a worst-case maximum load current of 250ma (60ma for the LT1934-1). the inductors rms current rating must be greater than the load current and its saturation current should be greater than i lim . to keep efficiency high, the series resistance (dcr) should be less than 0.3 w (1 w for the LT1934-1). table 2 lists several vendors and types that are suitable. this simple rule may not provide the optimum value for your application. if the load current is less, then you can relax the value of the inductor and operate with higher ripple current. this allows you to use a physically smaller inductor, or one with a lower dcr resulting in higher efficiency. the following provides more details to guide inductor selection. first, the value must be chosen so that the LT1934 can supply the maximum load current drawn from the output. second, the inductor must be rated appropriately so that the LT1934 will function reliably and the inductor itself will not be overly stressed. detailed inductor selection and maximum load current the square wave that the LT1934 produces at its switch pin results in a triangle wave of current in the inductor. the LT1934 limits the peak inductor current to i lim . because table 1 minimum maximum part v out lc out load LT1934 3.3v 100 m h 100 m f 300ma 47 m h47 m f 250ma 33 m h33 m f 200ma 5v 150 m h47 m f 300ma 68 m h33 m f 250ma 47 m h22 m f 200ma LT1934-1 3.3v 150 m h15 m f 60ma 100 m h10 m f 45ma 68 m h10 m f 20ma 5v 220 m h10 m f 60ma 150 m h4.7 m f 45ma 100 m h4.7 m f 20ma
8 LT1934/LT1934-1 1934f applicatio s i for atio wu uu the average inductor current equals the load current, the maximum load current is: i out(max) = i pk C d i l /2 where i pk is the peak inductor current and d i l is the peak- to-peak ripple current in the inductor. the ripple current is determined by the off time, t off = 1.8 m s, and the inductor value: d i l = (v out + v d ) ? t off /l i pk is nominally equal to i lim . however, there is a slight delay in the control circuitry that results in a higher peak current and a more accurate value is: i pk = i lim + 150ns ? (v in C v out )/l these expressions are combined to give the maximum load current that the LT1934 will deliver: i out(max) = 350ma + 150ns ? (v in C v out )/l C 1.8 m s ? (v out + v d )/2l (LT1934) i out(max) = 90ma + 150ns ? (v in C v out )/l C 1.8 m s ? (v out + v d )/2l (LT1934-1) the minimum current limit is used here to be conserva- tive. the third term is generally larger than the second term, so that increasing the inductor value results in a higher output current. this equation can be used to evalu- ate a chosen inductor or it can be used to choose l for a given maximum load current. the simple, single equa- tion rule given above for choosing l was found by setting d i l = i lim /2.5. this results in i out(max) ~0.8i lim (ignor- ing the delay term). note that this analysis assumes that the inductor current is continuous, which is true if the ripple current is less than the peak current or d i l < i pk . the inductor must carry the peak current without saturat- ing excessively. when an inductor carries too much current, its core material can no longer generate addi- tional magnetic flux (it saturates) and the inductance drops, sometimes very rapidly with increasing current. this condition allows the inductor current to increase at a very high rate, leading to high ripple current and decreased overload protection. inductor vendors provide current ratings for power induc- tors. these are based on either the saturation current or on the rms current that the inductor can carry without dissi- pating too much power. in some cases it is not clear which of these two determine the current rating. some data sheets are more thorough and show two current ratings, one for saturation and one for dissipation. for LT1934 applications, the rms current rating should be higher than the load current, while the saturation current should be higher than the peak inductor current calculated above. input capacitor step-down regulators draw current from the input supply in pulses with very fast rise and fall times. the input capacitor is required to reduce the resulting voltage ripple at the LT1934 and to force this switching current into a tight local loop, minimizing emi. the input capacitor must have low impedance at the switching frequency to do this effectively. a 2.2 m f ceramic capacitor (1 m f for the LT1934-1) satisfies these requirements. if the input source impedance is high, a larger value capacitor may be required to keep input ripple low. in this case, an electrolytic of 10 m f or more in parallel with a 1 m f ceramic is a good combination. be aware that the input table 2. inductor vendors vendor phone url part series comments murata (404) 426-1300 www.murata.com lqh3c small, low cost, 2mm height sumida (847) 956-0666 www.sumida.com cr43 cdrh4d28 cdrh5d28 coilcraft (847) 639-6400 www.coilcraft.com do1607c do1608c dt1608c wurth (866) 362-6673 www.we-online.com we-pd1, 2, 3, 4 electronics
9 LT1934/LT1934-1 1934f capacitor is subject to large surge currents if the LT1934 circuit is connected to a low impedance supply, and that some electrolytic capacitors (in particular tantalum) must be specified for such use. output capacitor and output ripple the output capacitor filters the inductors ripple current and stores energy to satisfy the load current when the LT1934 is quiescent. in order to keep output voltage ripple low, the impedance of the capacitor must be low at the LT1934s switching frequency. the capacitors equivalent series resistance (esr) determines this impedance. choose one with low esr intended for use in switching regulators. the contribution to ripple voltage due to the esr is approximately i lim ? esr. esr should be less than ~150m w for the LT1934 and less than ~500m w for the LT1934-1. the value of the output capacitor must be large enough to accept the energy stored in the inductor without a large change in output voltage. setting this voltage step equal to 1% of the output voltage, the output capacitor must be: c out > 50 ? l ? (i lim /v out ) 2 for example, an LT1934 producing 3.3v with l = 47 m h requires 33 m f. this value can be relaxed if small circuit size is more important than low output ripple. sanyos poscap series in b-case and c-case sizes pro- vides very good performance in a small package for the LT1934. similar performance in traditional tantalum ca- pacitors requires a larger package (c- or d-case). the applicatio s i for atio wu uu LT1934-1, with its lower switch current, can use a b-case tantalum capacitor. with a high quality capacitor filtering the ripple current from the inductor, the output voltage ripple is determined by the hysteresis and delay in the LT1934s feedback comparator. this ripple can be reduced further by adding a small (typically 10pf) phase lead capacitor between the output and the feedback pin. ceramic capacitors ceramic capacitors are small, robust and have very low esr. however, ceramic capacitors can cause problems when used with the LT1934. not all ceramic capacitors are suitable. x5r and x7r types are stable over temperature and applied voltage and give dependable service. other types (y5v and z5u) have very large temperature and voltage coefficients of capacitance. in the application circuit they may have only a small fraction of their nominal capacitance and voltage ripple may be much larger than expected. ceramic capacitors are piezoelectric. the LT1934s switch- ing frequency depends on the load current, and at light loads the LT1934 can excite the ceramic capacitor at audio frequencies, generating audible noise. if this is unaccept- able, use a high performance electrolytic capacitor at the output. the input capacitor can be a parallel combination of a 2.2 m f ceramic capacitor and a low cost electrolytic capacitor. the level of noise produced by the LT1934-1 table 3. capacitor vendors vendor phone url part series comments panasonic (714) 373-7366 www.panasonic.com ceramic, polymer, eef series tantalum kemet (864) 963-6300 www.kemet.com ceramic, tantalum t494, t495 sanyo (408) 749-9714 www.sanyovideo.com ceramic, polymer, poscap tantalum murata (404) 436-1300 www.murata.com ceramic avx www.avxcorp.com ceramic, tantalum tps series taiyo yuden (864) 963-6300 www.taiyo-yuden.com ceramic
10 LT1934/LT1934-1 1934f applicatio s i for atio wu uu when used with ceramic capacitors will be lower and may be acceptable. a final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LT1934. a ceramic input capacitor combined with trace or cable inductance forms a high quality (under damped) tank circuit. if the LT1934 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT1934s rating. this situation is easily avoided; see the hot plugging safely section. catch diode a 0.5a schottky diode is recommended for the catch diode, d1. the diode must have a reverse voltage rating equal to or greater than the maximum input voltage. the on semiconductor mbr0540 is a good choice; it is rated for 0.5a forward current and a maximum reverse voltage of 40v. schottky diodes with lower reverse voltage ratings usually have a lower forward drop and may result in higher efficiency with moderate to high load currents. however, these diodes also have higher leakage currents. this leakage current mimics a load current at the output and can raise the quiescent current of the LT1934 circuit, especially at elevated temperatures. boost pin considerations capacitor c3 and diode d2 are used to generate a boost voltage that is higher than the input voltage. in most cases a 0.1 m f capacitor and fast switching diode (such as the 1n4148 or 1n914) will work well. figure 2 shows two ways to arrange the boost circuit. the boost pin must be more than 2.5v above the sw pin for best efficiency. for outputs of 3.3v and above, the standard circuit (figure 2a) is best. for outputs between 2.8v and 3v, use a 0.22 m f capacitor and a small schottky diode (such as the bat-54). for lower output voltages the boost diode can be tied to the input (figure 2b). the circuit in figure 2a is more efficient because the boost pin current comes from a lower voltage source. you must also be sure that the maximum voltage rating of the boost pin is not exceeded. the minimum operating voltage of an LT1934 application is limited by the undervoltage lockout (~3v) and by the maximum duty cycle as outlined above. for proper start- up, the minimum input voltage is also limited by the boost circuit. if the input voltage is ramped slowly, or the LT1934 is turned on with its shdn pin when the output is already in regulation, then the boost capacitor may not be fully charged. because the boost capacitor is charged with the energy stored in the inductor, the circuit will rely on some minimum load current to get the boost circuit running properly. this minimum load will depend on input and output voltages, and on the arrangement of the boost circuit. the minimum load generally goes to zero once the circuit has started. figure 3 shows a plot of minimum load to start and to run as a function of input voltage. in many cases the discharged output capacitor will present a load to the switcher which will allow it to start. the plots show the worst-case situation where v in is ramping very slowly. use a schottky diode (such as the bat-54) for the lowest start-up voltage. at light loads, the inductor current becomes discontinu- ous and the effective duty cycle can be very high. this reduces the minimum input voltage to approximately 300mv above v out . at higher load currents, the inductor current is continuous and the duty cycle is limited by the v in boost gnd sw v in LT1934 (2a) d2 v out c3 v boost ?v sw @ v out max v boost @ v in + v out v in boost gnd sw v in LT1934 (2b) d2 1934 f02 v out c3 v boost ?v sw @ v in max v boost @ 2v in figure 2. two circuits for generating the boost voltage
11 LT1934/LT1934-1 1934f applicatio s i for atio wu uu figure 4. diode d4 prevents a shorted input from discharging a backup battery tied to the output; it also protects the circuit from a reversed input. the LT1934 runs only when the input is present maximum duty cycle of the LT1934, requiring a higher input voltage to maintain regulation. shorted input protection if the inductor is chosen so that it wont saturate exces- sively, an LT1934 buck regulator will tolerate a shorted output. there is another situation to consider in systems where the output will be held high when the input to the LT1934 is absent. this may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode or-ed with the LT1934s output. if the v in pin is allowed to float and the shdn pin is held high (either by a logic signal or because it is tied to v in ), then the LT1934s internal circuitry will pull its quiescent current through its sw pin. this is fine if your system can tolerate a few ma in this state. if you ground the shdn pin, the sw pin current will drop to essentially zero. however, if the v in pin is grounded while the output is held high, then parasitic diodes inside the LT1934 can pull large currents from the output through the sw pin and the v in pin. figure 4 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. v in boost gnd fb shdn sw 5 d4 v in 4 1 6 23 1m 100k LT1934 1934 f07 v out backup d4: mbr0530 figure 3. the minimum input voltage depends on output voltage, load current and boost circuit minimum input voltage v out = 3.3v minimum input voltage v out = 5v load current (ma) 3.5 input voltage (v) 4.0 4.5 5.0 5.5 6.0 0.1 10 100 1934 g12 3.0 1 LT1934 v out = 3.3v t a = 25 c boost diode tied to output v in to start v in to run load current (ma) 5 input voltage (v) 6 7 8 0.1 10 100 1934 g13 4 1 LT1934 v out = 5v t a = 25 c boost diode tied to output v in to start v in to run pcb layout for proper operation and minimum emi, care must be taken during printed circuit board layout. figure 5 shows the high current paths in the buck regulator circuit. note that large, switched currents flow in the power switch, the catch diode (d1) and the input capacitor (c2). the loop formed by these components should be as small as possible. furthermore, the system ground should be tied to the regulator ground in only one place; this prevents the switched current from injecting noise into the system ground. these components, along with the inductor and output capacitor, should be placed on the same side of the circuit board, and their connections should be made on that layer. place a local, unbroken ground plane below these components, and tie this ground plane to system ground at one location, ideally at the ground terminal of the output capacitor c1. additionally, the sw and boost nodes should be kept as small as possible. finally, keep the fb node as small as possible so that the ground pin and
12 LT1934/LT1934-1 1934f applicatio s i for atio wu uu figure 6. a good pcb layout ensures proper, low emi operation shutdown vias to local ground plane outline of local ground plane v in v out 1934 f06 system ground figure 5. subtracting the current when the switch is on (a) from the current when the switch is off (b) reveals the path of the high frequency switching current (c). keep this loop small. the voltage on the sw and boost nodes will also be switched; keep these nodes as small as possible. finally, make sure the circuit is shielded with a local ground plane v in sw gnd (5a) v in v sw c2 d1 c1 1934 f05 l1 sw gnd (5c) v in sw gnd (5b) i c1 ground traces will shield it from the sw and boost nodes. figure 6 shows component placement with trace, ground plane and via locations. include two vias near the gnd pin of the LT1934 to help remove heat from the LT1934 to the ground plane. hot plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of LT1934 and LT1934-1 circuits. how- ever, these capacitors can cause problems if the LT1934 is plugged into a live supply (see linear technology application note 88 for a complete discussion). the low loss ceramic capacitor combined with stray inductance in series with the power source forms an under damped tank circuit, and the voltage at the v in pin of the LT1934 can ring to twice the nominal input voltage, possibly exceeding the LT1934s rating and damaging the part. if the input supply is poorly controlled or the user will be plugging the LT1934 into an energized supply, the input network should be designed to prevent this overshoot.
13 LT1934/LT1934-1 1934f applicatio s i for atio wu uu + LT1934 2.2 f v in 10v/div i in 10a/div 10 s/div v in closing switch simulates hot plug i in (7a) (7b) (7c) (7d) (7e) low impedance energized 24v supply stray inductance due to 6 feet (2 meters) of twisted pair + LT1934 2.2 f 10 f 35v ai.ei. LT1934 2.2 f 0.1 f 1 LT1934-1 1 f LT1934-1 1 f 1934 f07 0.1 f 4.7 figure 7. a well chosen input network prevents input voltage overshoot and ensures reliable operation when the LT1934 is connected to a live supply figure 7 shows the waveforms that result when an LT1934 circuit is connected to a 24v supply through six feet of 24-gauge twisted pair. the first plot is the response with a 2.2 m f ceramic capacitor at the input. the input voltage rings as high as 35v and the input current peaks at 20a. one method of damping the tank circuit is to add another capacitor with a series resistor to the circuit. in figure 7b an aluminum electrolytic capacitor has been added. this capacitors high equivalent series resistance damps the circuit and eliminates the voltage overshoot. the extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit, though it is likely to be the largest component in the circuit. an alternative solution is shown in figure 7c. a 1 w resistor is
14 LT1934/LT1934-1 1934f added in series with the input to eliminate the voltage overshoot (it also reduces the peak input current). a 0.1 m f capacitor improves high frequency filtering. this solution is smaller and less expensive than the electrolytic capaci- tor. for high input voltages its impact on efficiency is minor, reducing efficiency less than one half percent for a 5v output at full load operating from 24v. voltage overshoot gets worse with reduced input capaci- tance. figure 7d shows the hot plug response with a 1 m f ceramic input capacitor, with the input ringing above 40v. the LT1934-1 can tolerate a larger input resistance, such as shown in figure 7e where a 4.7 w resistor damps the voltage transient and greatly reduces the input current glitch on the 24v supply. high temperature considerations the die temperature of the LT1934 must be lower than the maximum rating of 125 c. this is generally not a concern unless the ambient temperature is above 85 c. for higher temperatures, care should be taken in the layout of the circuit to ensure good heat sinking of the LT1934. the maximum load current should be derated as the ambient temperature approaches 125 c. the die temperature is calculated by multiplying the LT1934 power dissipation by the thermal resistance from junction to ambient. power dissipation within the LT1934 can be applicatio s i for atio wu uu estimated by calculating the total power loss from an efficiency measurement and subtracting the catch diode loss. the resulting temperature rise at full load is nearly independent of input voltage. thermal resistance depends on the layout of the circuit board, but a value of 150 c/w is typical. the temperature rise for an LT1934 producing 5v at 250ma is approximately 25 c, allowing it to deliver full load to 100 c ambient. above this temperature the load current should be reduced. for 3.3v at 250ma the tem- perature rise is 15 c. finally, be aware that at high ambient temperatures the external schottky diode, d1, is likely to have significant leakage current, increasing the quiescent current of the LT1934 converter. outputs greater than 6v for outputs greater than 6v, tie a diode (such as a 1n4148) from the sw pin to v in to prevent the sw pin from ringing above v in during discontinuous mode operation. the 12v output circuit in typical applications shows the location of this diode. also note that for outputs above 6v, the input voltage range will be limited by the maximum rating of the boost pin. the 12v circuit shows how to overcome this limitation using an additional zener diode.
15 LT1934/LT1934-1 1934f typical applicatio s u 3.3v step-down converter boost v in LT1934-1 shdn 1934 ta04 c2 1 f 0.1 f 10pf c1: taiyo yuden jmk316bj226ml c2: taiyo yuden gmk316bj105ml d1: zetex zhcs400 or on semi mbr0540 d2: central cmdsh-3 l1: coilcraft do1608c-104 or wurth electronics we-pd4 type s v out 3.3v 45ma d2 604k 1m l1 100 h d1 v in 4.5v to 34v on off sw fb gnd c1 22 f + 5v step-down converter boost v in LT1934-1 shdn 1934 ta05 c2 1 f 0.1 f 10pf c1: taiyo yuden jmk316bj226ml c2: taiyo yuden gmk316bj105ml d1: zetex zhcs400 or on semi mbr0540 d2: central cmpd914 l1: coilcraft do1608c-154 or wurth electronics we-pd4 type s v out 5v 45ma d2 332k 1m l1 150 h d1 v in 6.5v to 34v on off sw fb gnd c1 22 f +
16 LT1934/LT1934-1 1934f 1.8v step-down converter boost v in LT1934 shdn 1934 ta06 c2 2.2 f 0.1 f c1: sanyo 2r5tpb100m c2: taiyo yuden emk316bj225ml d1: zetex zhcs400 or on semi mbr0540 d2: central cmpd914 l1: sumida cr43-330 v out 1.8v 250ma d2 332k 147k l1 33 h d1 v in 3.6v to 16v on off sw fb gnd c1 100 f + boost v in LT1934-1 shdn 1934 ta08 1 f d4 10v c1 10pf d1: on semiconductor mbr0540 d2, d3: bat54 d4: central cmpz5240b l1: coiltronics ctx50-1 zener diode d4 provides an undervoltage lockout, reducing the input current required at start-up v out 3v 9ma isolated out 3v 3ma d2 d3 715k 390k 1m l1a 50 h l1b 50 h d1 v in 14v to 32v <3.6ma sw fb gnd 33 f + 10 f + loop powered 3.3v supply with additional isolated output typical applicatio s u
17 LT1934/LT1934-1 1934f standalone 350ma li-ion battery charger boost v in LT1934 shdn 1934 ta07a c2 1 f d3 0.1 f c1: sanyo 6tpb47m (619) 661-6835 c2: taiyo yuden gmk316bj105ml (408) 573-4150 d1, d3: on semiconductor mbr0540 (602) 244-6600 d2: central cmdsh-3 (516) 435-1110 l1: sumida cr43-470 (847) 956-0667 d2 332k 1m 1k 1k 10k l1 47 h d1 v in 7v to 28v sw fb gnd v in chrg ltc4052 acpr gate sense bat 350ma 1-cell 4.2v li-ion battery gnd timer c1 47 f charge status ac present + c5 10 f + 0.047 f c timer 0.1 f 0.022 f battery voltage (v) 2.5 charge current (ma) 200 300 4.5 1934 ta07b 100 0 3 3.5 4 500 400 v in = 12v v in = 8v v in = 24v typical applicatio s u
18 LT1934/LT1934-1 1934f typical applicatio s u 12v step-down converter boost v in LT1934 shdn 1934 ta09 c2 2.2 f 0.1 f c1: kemet t495d226k020as c2: taiyo yuden gmk325bj225mn d1: on semi mbr0540 d2, d4: central cmpd914 d3: central cmpz5234b 6.2v zener l1: tdk slf6028t-101mr42 v out 12v 170ma d4 100k 866k l1 100 h d1 v in 15v to 32v on off sw fb gnd d2 d3 c1 22 f +
19 LT1934/LT1934-1 1934f package descriptio n u s6 package 6-lead plastic tsot-23 (reference ltc dwg # 05-08-1636) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 1.50 ?1.75 (note 4) 2.80 bsc 0.30 ?0.45 6 plcs (note 3) datum ? 0.09 ?0.20 (note 3) s6 tsot-23 0302 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 ?0.90 1.00 max 0.01 ?0.10 0.20 bsc 0.30 ?0.50 ref pin one id note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref
20 LT1934/LT1934-1 1934f lt/tp 0703 1k ? printed in usa ? linear technology corporation 2002 related parts linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear.com part number description comments lt1616 25v, 500ma (i out ), 1.4mhz, high efficiency v in = 3.6v to 25v, v out = 1.25v, i q = 1.9ma, i sd = <1 m a, step-down dc/dc converter thinsot package lt1676 60v, 440ma (i out ), 100khz, high efficiency v in = 7.4v to 60v, v out = 1.24v, i q = 3.2ma, i sd = 2.5 m a, step-down dc/dc converter s8 package lt1765 25v, 2.75a (i out ), 1.25mhz, high efficiency v in = 3v to 25v, v out = 1.2v, i q = 1ma, i sd = 15 m a, step-down dc/dc converter s8, tssop16e packages lt1766 60v, 1.2a (i out ), 200khz, high efficiency v in = 5.5v to 60v, v out = 1.2v, i q = 2.5ma, i sd = 25 m a, step-down dc/dc converter tssop16/e package lt1767 25v, 1.2a (i out ), 1.25mhz, high efficiency v in = 3v to 25v; v out = 1.2v, i q = 1ma, i sd = 6 m a, step-down dc/dc converter ms8/e packages lt1776 40v, 550ma (i out ), 200khz, high efficiency v in = 7.4v to 40v; v out = 1.24v, i q = 3.2ma, i sd = 30 m a, step-down dc/dc converter n8, s8 packages ltc ? 1877 600ma (i out ), 550khz, synchronous v in = 2.7v to 10v; v out = 0.8v, i q = 10 m a, i sd = <1 m a, step-down dc/dc converter ms8 package ltc1879 1.2a (i out ), 550khz, synchronous v in = 2.7v to 10v; v out = 0.8v, i q = 15 m a, i sd = <1 m a, step-down dc/dc converter tssop16 package lt1956 60v, 1.2a (i out ), 500khz, high efficiency v in = 5.5v to 60v, v out = 1.2v, i q = 2.5ma, i sd = 25 m a, step-down dc/dc converter tssop16/e package ltc3405/ltc3405a 300ma (i out ), 1.5mhz, synchronous v in = 2.7v to 6v, v out = 0.8v, i q = 20 m a, i sd = <1 m a, step-down dc/dc converter thinsot package ltc3406/ltc3406b 600ma (i out ), 1.5mhz, synchronous v in = 2.5v to 5.5v, v out = 0.6v, i q = 20 m a, i sd = <1 m a, step-down dc/dc converter thinsot package ltc3411 1.25a (i out ), 4mhz, synchronous v in = 2.5v to 5.5v, v out = 0.8v, i q = 60 m a, i sd = <1 m a, step-down dc/dc converter ms package ltc3412 2.5a (i out ), 4mhz, synchronous v in = 2.5v to 5.5v, v out = 0.8v, i q = 60 m a, i sd = <1 m a, step-down dc/dc converter tssop16e package ltc3430 60v, 2.75a (i out ), 200khz, high efficiency v in = 5.5v to 60v, v out = 1.2v, i q = 2.5ma, i sd = 30 m a, step-down dc/dc converter tssop16e package 5v step-down converter boost v in LT1934 shdn 1934 ta03 c2 2.2 f 0.1 f 10pf c1: sanyo 6tpb68m c2: taiyo yuden gmk325bj225mn d1: zetex zhcs400 or on semi mbr0540 d2: central cmpd914 l1: sumida cdrh5d28-680 v out 5v 250ma d2 332k 1m l1 68 h d1 v in 6.5v to 34v on off sw fb gnd c1 68 f + typical applicatio u

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